Invitation to Computer Science 8th Edition

Published by Cengage Learning
ISBN 10: 1337561916
ISBN 13: 978-1-33756-191-4

Chapter 6 - 6.3 - Assemblers and Assembly Language - Practice Problems - Page 294: 4

Answer

The first instruction will cause the memory location labeled L to be loaded into register R. Because $\mathrm{L}$ contains the data value $+1,$ this will go into $R,$ overwriting whatever was there previously. After completing one instruction, a processor will go on to the next one unless told to do otherwise-that is the essence of the Fetch/Decodel Execute cycle. Thus, the processor will next try to execute the "instruction" $+1 .$ As we explained in the text, this will be incorrectly interpreted as the op code 0 and adress field of $1,$ which is a LOAD 1. Thus, the value $+1$ in register R will be overwritten with the contents of memory location $1 .$

Work Step by Step

The first instruction will cause the memory location labeled L to be loaded into register R. Because $\mathrm{L}$ contains the data value $+1,$ this will go into $R,$ overwriting whatever was there previously. After completing one instruction, a processor will go on to the next one unless told to do otherwise-that is the essence of the Fetch/Decodel Execute cycle. Thus, the processor will next try to execute the "instruction" $+1 .$ As we explained in the text, this will be incorrectly interpreted as the op code 0 and adress field of $1,$ which is a LOAD 1. Thus, the value $+1$ in register R will be overwritten with the contents of memory location $1 .$
Update this answer!

You can help us out by revising, improving and updating this answer.

Update this answer

After you claim an answer you’ll have 24 hours to send in a draft. An editor will review the submission and either publish your submission or provide feedback.